Using Enhanced Test Systems Based on Digital IC Test Model for the Improvement of Test Yield

In this work, we use statistical concepts to evaluate the joint probability distribution of manufacturing and test parameters estimate future trend wafer yield. Owing difference between development speeds testing technology technology, capability wafers is far behind semiconductor. Therefore, with advancement in yield loss caused by tester inaccuracy has become an important problem. article, propose enhanced integrated circuit (IC) scheme (ITS) that uses multiplex improve quality pass rate retesting, rely on cost evaluation mechanism obtain best profit. Furthermore, International Roadmap for Devices Systems (IRDS) 2017 data are used trends, results prove (ETS) can effectively retest time